The present invention relates to the field of synchronous networks and, in particular, relates to a scheme for synchronizing a network to, a common clock reference that finds particular usefulness in networks that have inherent synchronization requirements, for example networks configured to transport voice and video information.
In modern telecommunications and data communication networks, digital switching and transmission systems are used to transport voice, video and/or data information between intermediate network nodes and end-users. These digital switching and transmission systems must be accurately synchronized with one another to prevent impairments such as jitter, wander and phase transients. By synchronization, it is meant that the digital switching and transmission systems must operate at a common clock rate. As noted in Bellcore Generic Requirements Document GR-436-CORE, entitled xe2x80x9cDigital Network Synchronization Planxe2x80x9d, Jun. 1, 1994, this characteristic is more accurately termed xe2x80x9csyntonizationxe2x80x9d (meaning at the same frequency). However, the term synchronization has become accepted in the industry and will be used herein.
To ensure that the common clock rate is maintained between nodes of a network, so-called synchronized networks are built. Within these networks, synchronization references that are traceable to a highly accurate clock source (a so-called Primary Reference Source or PRS), for example as may be obtained from one or more Global Positioning System (GPS) satellites and/or ground stations, are passed among the nodes. Generally, these synchronization references are passed in a hierarchical fashion, with downstream nodes in the hierarchy receiving the references from upstream nodes. Within the hierarchy of the network, the PRS is located at the highest level (also known as the lowest stratum) and all the timing references are traceable thereto.
In the past, establishing this hierarchy through which the synchronization references are passed has required network administrators to manually configure each node of the network so as to indicate the clock source to be used by that node. For networks of any appreciable size, this is a non-trivial process and it is complicated by the need to specify backup clock sources to be used in the event of a node or transmission link failure. Thus, it would be desirable to automate this process of establishing the synchronization hierarchy.
In one embodiment, a clock distribution tree for a digital network is automatically established through the use of spanning tree computations at nodes of the network. The computations rely, at least in part, upon the exchange of clock distribution messages between the nodes of the network. Each clock distribution message includes information regarding a clock source available at the source node of the message. The clock distribution tree is hierarchical in nature, with nodes that are lower in the hierarchy (i.e., at a higher stratum level) extracting clock from links with nodes that are higher in the hierarchy (i.e., at a lower stratum level).
The spanning tree computations involve a root selection process and a convergence test. The root selection process is made on the basis of configuration vectors exchanged as part of the clock distribution messages. The configuration vectors may include a priority value for a clock source, a stratum level and primary reference source identifier for that clock source, a stratum level of a node transmitting the message and the network address of that node. The convergence test includes determining whether a number of clock distribution messages received or transmitted equals a network maximum diameter parameter for the network.
A further embodiment provides a method for automatically selecting, at a node of a digital network, a clocking source for that node. The selection is made according to a comparison of clock source configuration vectors, each vector associated with a port in the network and each vector identifying the associated port""s priority, a stratum level of a clock source available at that port and an indication of a primary reference clock source for that port. The clock source configuration vectors are exchanged between nodes of the network as part of a configuration message. In some cases, one of the configuration vectors may be associated with a virtual node of the network.
Each node of the network is preferably configured to extract clock information only from links to adjacent nodes at an equal or lower stratum level. For example, nodes may be configured to examine portions of the configuration messages to determine the stratum level of the transmitting node and thereby determine whether to link to the node is a candidate link for extracting clock. This helps preserve the synchronous digital hierarchy of the network.